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feat(cpufeatures): Extend ARM64 and x86 feature detection #1565

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ea3ca0f
feat(cpufeatures): Extend ARM64 feature detection
reneleonhardt Oct 20, 2026
d810432
feat(cpufeatures): Extend x86 SIMD detection
reneleonhardt Oct 20, 2026
d2fe9a3
ci(cpufeatures): Run Linux ARM64 tests natively
reneleonhardt Oct 20, 2026
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8 changes: 3 additions & 5 deletions .github/workflows/cpufeatures.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,6 @@ jobs:
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
targets: x86_64-apple-darwin
- run: cargo test

# Windows tests
Expand All @@ -98,7 +97,7 @@ jobs:
targets: ${{ matrix.target }}
- run: cargo test --target ${{ matrix.target }}

# Cross-compiled tests
# Linux ARM64 tests
cross:
strategy:
matrix:
Expand All @@ -108,16 +107,15 @@ jobs:
rust: 1.85.0 # MSRV
- target: aarch64-unknown-linux-gnu
rust: stable
runs-on: ubuntu-latest
runs-on: ubuntu-24.04-arm
steps:
- uses: actions/checkout@v7
- uses: RustCrypto/actions/cargo-cache@master
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.rust }}
targets: ${{ matrix.target }}
- uses: RustCrypto/actions/cross-install@master
- run: cross test --target ${{ matrix.target }}
- run: cargo test --target ${{ matrix.target }}

# Build-only tests
build-only:
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11 changes: 11 additions & 0 deletions cpufeatures/CHANGELOG.md
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Expand Up @@ -5,6 +5,17 @@ All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

## Unreleased
### Added
- Detect ARM64 NEON, CRC, CSSC, BF16, SVE, LSE2, MOPS and floating-point extensions.
- Detect x86 SIMD prerequisites, AVX2/AVX-512 extensions, XSAVE variants and ERMSB/PREFETCHW memory hints.

### Fixed
- Return false for unavailable Apple capability keys.
- Check all required ARM64 capability bits and x86 CPU and OS state.
- Check CPUID limits before reading leaves and subleaves.
- Require an `unsafe` context to check register state from supplied CPUID data.

## 0.3.1 (2026-08-26)
### Changed
- Use compile-time target feature detection under Miri ([#1513])
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49 changes: 48 additions & 1 deletion cpufeatures/README.md
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Expand Up @@ -61,15 +61,41 @@ calls, thus runtime overhead for them is minimal.
*NOTE: target features with an asterisk are unstable (nightly-only) and subject
to change to match upstream name changes in the Rust standard library.*

Detection accepts these names even if enabling a feature needs a newer compiler.

### `aarch64`

Linux, iOS, and macOS/ARM only (ARM64 does not support OS-independent feature detection)
Runtime detection is available on Linux, Android, iOS and macOS.

Target features:

- `aes`*
- `bf16`
- `crc`
- `cssc`*
- `f32mm`
- `f64mm`
- `faminmax`*
- `fcma`
- `fhm`
- `frintts`
- `i8mm`
- `jsconv`
- `lse2`*
- `lut`*
- `mops`*
- `neon`
- `rand`
- `sha2`*
- `sha3`*
- `sve`
- `sve-b16b16`*
- `sve2`
- `sve2-aes`
- `sve2-bitperm`
- `sve2-sha3`
- `sve2-sm4`
- `sve2p1`*

### `loongarch64`

Expand Down Expand Up @@ -102,22 +128,39 @@ Target features:
- `aes`
- `avx`
- `avx2`
- `avxifma`
- `avxneconvert`
- `avxvnni`
- `avxvnniint8`
- `avxvnniint16`
- `avx512bf16`
- `avx512bw`*
- `avx512cd`*
- `avx512dq`*
- `avx512er`*
- `avx512f`*
- `avx512fp16`
- `avx512ifma`*
- `avx512pf`*
- `avx512vl`*
- `avx512vbmi`*
- `avx512vbmi2`*
- `avx512vnni`
- `avx512vp2intersect`
- `bmi1`
- `bmi2`
- `cmpxchg16b`
- `ermsb`*
- `f16c`
- `fma`
- `fxsr`
- `lahfsahf`*
- `lzcnt`
- `mmx`
- `movbe`
- `pclmulqdq`
- `popcnt`
- `prfchw`*
- `rdrand`
- `rdseed`
- `sgx`
Expand All @@ -131,6 +174,10 @@ Target features:
- `sha512`
- `sm3`
- `sm4`
- `xsave`
- `xsavec`
- `xsaveopt`
- `xsaves`

If you would like detection support for a target feature which is not on
this list, please [open a GitHub issue][github-issue].
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