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Add Renesas RX71M support - #942
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🟡 Changes recommended
Flash timeout handling can continue writing to a full buffer or resume execution before code flash is readable.
2 open findings
What changed in this PR
Adds Renesas RX71M support to wolfBoot using software cryptography and the GNU RX toolchain.
Changes:
- Adds target configuration, linker layout, boot vectors, and board initialization.
- Implements RAM-resident flash programming and erase operations.
- Adds build coverage, ROMCODE checks, and setup documentation.
| File | Description |
|---|---|
| test-app/RENESAS_RX.ld | Places flash routines in RAM. |
| test-app/Makefile | Enables RAM execution for the RX71M driver. |
| test-app/app_renesas_rx.c | Reads partition state through the public API. |
| src/boot_renesas.c | Adds RX71M fault vectors and protection settings. |
| hal/rx71m.ld | Defines RX71M memory and section layout. |
| hal/rx71m.c | Identifies the shared HAL implementation. |
| hal/renesas-rx.h | Adds RX71M registers and flash constants. |
| hal/renesas-rx.c | Implements board initialization and flash operations. |
| docs/Targets.md | Documents RX71M setup and limitations. |
| docs/Renesas.md | Lists RX71M support. |
| config/examples/renesas-rx71m.config | Supplies the example target configuration. |
| arch.mk | Adds target checks and build flags. |
| .github/workflows/test-configs.yml | Adds RX71M build variants. |
| .github/workflows/test-build-renesas-rx.yml | Checks the ROMCODE protection word. |
| .github/docker/renesas-rx/README.md | Lists RX71M among supported configurations. |
🧠 Review effort: Balanced
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- renesas-rx71m.config, rx71m.ld, rx71m.c: RSK+ RX71M layout with NVM_FLASH_WRITEONCE=1, .romcode at 0xFFFFFF80 and .ofs_rx71m at 0x00120040. - arch.mk: reject PKA, DELTA_UPDATES and NVM_FLASH_WRITEONCE other than 1 for rx71m; build with -misa=v2; drop .ofs_rx71m from wolfboot.bin and fill gaps with 0xFF. - renesas-rx.h: rx71m clock, flash, FACI and MPC values; hal_clk_init() sets SYS_MEMWAIT. - boot_renesas.c: INT_Fault for the rx71m fault vectors, RomCodeArea[] with ROMCODE 0xFFFFFFFF, and the option-setting array under WOLFBOOT_RENESAS_OSM.
- hal_clk_init(): rx71m runs the main crystal (RX_MAIN_XTAL_HZ, default 24MHz) through the PLL to 240MHz. - uart_init(): SCI7 on P90/P92 by default; uart_write() waits for TEND. hal_led_on()/hal_led_off(): LED0 on P03. - renesas-rx.c: TARGET_rx71m flash driver run from RAM, with #error unless RAM_CODE and __WOLFBOOT are defined. It copies the FCU firmware at init, programs 256-byte units at most once per erase, and masks interrupts with timeouts and FSTATR checks for each program and erase. - renesas-rx.h: PSW, FASTAT and FAEINT bits and the new flash error codes. - renesas-rx71m.config: commented RX_MAIN_XTAL_HZ line. - test-app: link .ramcode into RAM and build renesas-rx.o with RAM_CODE and __WOLFBOOT for rx71m.
- app_renesas_rx.c: printPart() takes the partition id and reads the state through wolfBoot_get_partition_state(); the trailer line prints BOOT or none.
- test-configs.yml: RX71M build jobs, little endian and BIG_ENDIAN=1 with WOLFBOOT_RENESAS_OSM. - test-build-renesas-rx.yml: check that ROMCODE in wolfboot.bin is 0xFFFFFFFF for rx71m. - Targets.md: Renesas RX71M section; Renesas.md and the CI image README list RX71M.
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Fenrir Automated Review — PR #942
Scan targets checked: wolfboot-src, wolfboot-bugs
Not reviewed (no scan target covers them): .github/docker/renesas-rx/README.md, .github/workflows/test-build-renesas-rx.yml, .github/workflows/test-configs.yml, arch.mk, config/examples/renesas-rx71m.config, docs/Renesas.md, docs/Targets.md, hal/renesas-rx.h, hal/rx71m.ld, test-app/Makefile, test-app/RENESAS_RX.ld
Coverage: 3 of 4 in-scope changed file(s) opened by the reviewer; not opened: hal/rx71m.c
Fenrir result: Approved ✅
No new issues found in the changed files.
Advisory only — this automated result does not count as a GitHub approval.
Review tier: Lite
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Summary
Adds wolfBoot support for the Renesas RX71M (RSK+ RX71M, R5F571MLCDFC: 4 MB code flash, 512 KB RAM, no TSIP), built with GCC for Renesas RX 14.2 (
USE_GCC=0) and using software crypto only.Changes (
hal/renesas-rx.c)config/examples/renesas-rx71m.config,hal/rx71m.ldandarch.mkchecks.NVM_FLASH_WRITEONCE=1is required;PKA=1andDELTA_UPDATES=1are rejected.src/boot_renesas.c): the RXv2 fault vectors go toINT_Fault.RomCodeArea[]keepsROMCODE(0xFFFFFF9C) at0xFFFFFFFF, so ROM code protection stays off. The option-setting memory is written only with the opt-inWOLFBOOT_RENESAS_OSM.RX_MAIN_XTAL_HZsets the crystal for other boards). The console is on SCI7 (P90/P92), and LED0 is on P03.FLASH_ERR_NOT_BLANKotherwise)FSTATRerror checks#errorunlessRAM_CODEand__WOLFBOOTare defineduart_write()waits forTENDafter the last character. The test app'sprintPart()reads the state throughwolfBoot_get_partition_state().ROMCODEinwolfboot.binis0xFFFFFFFF.docs/Targets.md(layout, flashing withrfp-cli, update wear, OSM and endianness) and an RX71M entry indocs/Renesas.md.Verification
On the RSK+ RX71M with an E2 Lite:
wolfBoot_success()persists across resetPSW.Iaround program/eraseEXTB/INTBatmainFFFF0400/FFFF0000Not in this PR
USE_GCC?=0in their configs, and routing their fault vectors toINT_Fault.